1. Field of the Invention
The present invention relates to a wafer level stacked package and a method for manufacturing the same.
2. Description of the Related Art
In general, a wafer level package refers to a package in which all packaging processes are completed on a wafer and so the size of the package is similar to that of a semiconductor die. This wafer level package can not only shorten the manufacturing process, but also steeply reduce materials used for the semiconductor assembly, thereby making it possible to save cost of production.
Such a wafer level package comprises a semiconductor die, a substrate electrically connected to the semiconductor die, an encapsulant encapsulating the semiconductor die, and electrically conductive terminals formed on one side of the substrate to be packaged in an external device. Also, a manufacturing method of this wafer level package includes an operation of placing a substrate, which is formed with a plurality of electrically conductive patterns, on a wafer and simultaneously electrically connecting each semiconductor die of the wafer to each unit of the substrate, an operation of forming electrically conductive terminals on one side of the substrate, an operation of encapsulating the respective semiconductor dies of the wafer and the substrate, and an operation of sawing the respective semiconductors die together with the substrate from the wafer to obtain individual independent semiconductor packages.
However, the conventional wafer level package and its manufacturing method as stated above have a drawback in that it is difficult to innovatively improve memory capacity or functionality because only one semiconductor die is located on the substrate. For example, two or more memory chips, a memory chip and a DSP (Digital Signal Processor), a memory chip and a PLC (Programmable Logic Controller) or the like cannot be formed into one semiconductor package when the package has only one substrate. Also, it is not possible to stack two or more finished wafer level packages with each other, which goes against the trend toward the development of a high-capacity and high-functional semiconductor package.
Furthermore, since the manufacturing method of the conventional wafer level package includes the process of encapsulating the semiconductor die with the encapsulant, not only the manufacturing process becomes complex, but also the semiconductor die completely surrounded by the encapsulant significantly deteriorates heat radiation property and electrical performance of the package.